cosmic-rays mlab mlab-module ionizing-radiation


Sample and hold circuit for photomultiplier and semiconductor PIN diode pulse signal processing


This is an open-source hardware design, one of the modules from the MLAB labolatory system.

PCRD07 - ADC circuit with analog memory for PIN and SiPM detectors

The analog backend for radiation detector with pulsed outputs. The pulses are expected to carry information about energy and the type of particle interacting with the detector. The detectors could be semiconductor diodes or scintillators with semiconductor photomultipliers.

PCRD07A Top view

PCRD07A Bottom view

Examples of detectors that could be connected to the PCRD07 analog-backend.

Basic usage

The circuit can operate in multiple modes. The operation mode depends on the logic used to control the circuit.

  1. The first operation mode is the peak detector, which stores the maximal value of peak output from SiPM. This mode holds the maximal value of pulse until the circuit is reset (usually after AD conversion)
  2. Pulse discriminator, where the AD converted value is compared with a predefined threshold. After passing this threshold the circuit should be reset.
  3. The energy integrator in that mode signal is ADconverted as fast as possible, and the dose is integrated numerically over the specified time interval.
  4. Pulse shape analyser. The ADC could sample multiple values of pulse decay slope referenced to the pulse peak.

Principle of function

The signal output from the scintillation detector is pulsed. The pulses are stored in a specially developed sample-hold circuit that behaves as a signal follower and analog memory. When signal #PeakDetect_Trace is in H an analog switch U5 turns on and a signal at an output U2 follows a signal at the input with a slight delay which is done by R13 and C19. If signal #PeakDetect_Trace is switched to a high impedance state the analog switch U5 starts to be controlled by a comparator U1. In this case, when the input signal goes from high to low, a positive input of the comparator will be at a higher voltage than a negative input, following a voltage at capacitor C19.