Subversion Repositories svnkaklik

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Ignore whitespace Rev 853 → Rev 854

/programy/C/PIC/mereni/TDC/Pulzni_generator/main.c
1,4 → 1,4
#include "D:\svnKaklik\programy\C\PIC\mereni\TDC\Pulzni_generator\main.h"
#include "main.h"
 
#use fast_io (D)
 
34,8 → 34,6
}
 
// Mode 1
 
TDC_init();
delay_ms(50);
output_low(START);
/programy/C/PIC/mereni/TDC/Pulzni_generator/main.h
1,35 → 1,35
#include <18F4550.h>
#device adc=8
 
#FUSES NOWDT //No Watch Dog Timer
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
#FUSES HSPLL //High Speed Crystal/Resonator with PLL enabled
#FUSES NOPROTECT //Code not protected from reading
#FUSES NOBROWNOUT //No brownout reset
#FUSES BORV20 //Brownout reset at 2.0V
#FUSES NOPUT //No Power Up Timer
#FUSES NOCPD //No EE protection
#FUSES STVREN //Stack full/underflow will cause reset
#FUSES NODEBUG //No Debug mode for ICD
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES NOWRT //Program memory not write protected
#FUSES NOWRTD //Data EEPROM not write protected
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES FCMEN //Fail-safe clock monitor enabled
#FUSES PBADEN //PORTB pins are configured as analog input channels on RESET
#FUSES NOWRTC //configuration not registers write protected
#FUSES NOWRTB //Boot block not write protected
#FUSES NOEBTR //Memory not protected from table reads
#FUSES NOEBTRB //Boot block not protected from table reads
#FUSES NOCPB //No Boot Block code protection
#FUSES MCLR //Master Clear pin enabled
#FUSES LPT1OSC //Timer1 configured for low-power operation
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
#FUSES PLL5 //Divide By 5(20MHz oscillator input)
#FUSES CPUDIV1 //No System Clock Postscaler
#FUSES USBDIV //USB clock source comes from PLL divide by 2
#FUSES VREGEN //USB voltage regulator enabled
#FUSES ICPRT //ICPRT enabled
#FUSES NOWDT //No Watch Dog Timer
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
#FUSES HSPLL //High Speed Crystal/Resonator with PLL enabled
#FUSES NOPROTECT //Code not protected from reading
#FUSES NOBROWNOUT //No brownout reset
#FUSES BORV20 //Brownout reset at 2.0V
#FUSES NOPUT //No Power Up Timer
#FUSES NOCPD //No EE protection
#FUSES STVREN //Stack full/underflow will cause reset
#FUSES NODEBUG //No Debug mode for ICD
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES NOWRT //Program memory not write protected
#FUSES NOWRTD //Data EEPROM not write protected
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES FCMEN //Fail-safe clock monitor enabled
#FUSES PBADEN //PORTB pins are configured as analog input channels on RESET
#FUSES NOWRTC //configuration not registers write protected
#FUSES NOWRTB //Boot block not write protected
#FUSES NOEBTR //Memory not protected from table reads
#FUSES NOEBTRB //Boot block not protected from table reads
#FUSES NOCPB //No Boot Block code protection
#FUSES MCLR //Master Clear pin enabled
#FUSES LPT1OSC //Timer1 configured for low-power operation
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
#FUSES PLL5 //Divide By 5(20MHz oscillator input)
#FUSES CPUDIV1 //No System Clock Postscaler
#FUSES USBDIV //USB clock source comes from PLL divide by 2
#FUSES VREGEN //USB voltage regulator enabled
#FUSES ICPRT //ICPRT enabled
 
#use delay(clock=20000000)
#use delay(clock=48000000)
 
/programy/C/PIC/mereni/TDC/Pulzni_generator/main.pjt
1,9 → 1,10
[PROJECT]
Target=D:\svnKaklik\programy\C\PIC\mereni\TDC\Pulzni_generator\main.hex
Target=main.hex
Development_Mode=
Processor_Text=PIC18F4550
ToolSuite=CCS
[D:\svnKaklik\programy\C\PIC\mereni\TDC\Pulzni_generator\main]
Processor=0x4550
[main]
Type=4
Path=
FileList=
11,10 → 12,15
OptionString=
AdditionalOptionString=
[mru-list]
1=D:\svnKaklik\programy\C\PIC\mereni\TDC\Pulzni_generator\main.c
1=main.c
[Windows]
0=0000 %S 0 0 796 451 3 0
[Units]
Link=0
Count=1
1=D:\svnKaklik\programy\C\PIC\mereni\TDC\Pulzni_generator\main
1=main
[Opened Files]
1=main.c
2=main.h
3=..\..\..\..\..\..\..\..\..\Program Files (x86)\PICC\devices\18F4550.h
4=