| 0,0 → 1,1373 |
|---|
| PADS Router 2005 SPac1, Routing report |
| Design: D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Wed Jun 21 21:08:06 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+39) |
| Vias: 0(+0) |
| Trace length: 18330(+18330) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:07 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+39) |
| Vias: 0(+0) |
| Trace length: 18456(+18456) Mils |
| Duration 00:00:02(+00:00:02) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18330(-126) Mils |
| Rerouted: 0 |
| Duration 00:00:07(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:08:28 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18239(-91) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18330(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18239(-91) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:08:58 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18197(+1112) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18286(+1201) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18197(-89) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:09:09 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18197(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18197(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18197(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:10:07 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+7) |
| Vias: 0(+0) |
| Trace length: 17634(+3285) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+7) |
| Vias: 0(+0) |
| Trace length: 17653(+3304) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17634(-19) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:11:11 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+9) |
| Vias: 0(+0) |
| Trace length: 17264(+3659) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+9) |
| Vias: 0(+0) |
| Trace length: 17347(+3742) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17264(-83) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:11:18 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17297(+33) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17264(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17297(+33) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:11:41 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 38(+3) |
| Vias: 0(+0) |
| Trace length: 16203(+3778) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:08 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 38(+3) |
| Vias: 0(+0) |
| Trace length: 16222(+3797) Mils |
| Duration 00:00:02(+00:00:02) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16203(-19) Mils |
| Rerouted: 0 |
| Duration 00:00:08(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:11:50 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 16203(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 16203(+0) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16203(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:12:24 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+1) |
| Vias: 0(+0) |
| Trace length: 18010(+1245) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:16 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+1) |
| Vias: 0(+0) |
| Trace length: 18165(+1400) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18010(-155) Mils |
| Rerouted: 0 |
| Duration 00:00:16(+00:00:15) |
| ============================================================================================== |
| Wed Jun 21 21:12:54 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17141(-129) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:07 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17270(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17141(-129) Mils |
| Rerouted: 0 |
| Duration 00:00:07(+00:00:07) |
| ============================================================================================== |
| Wed Jun 21 21:13:26 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 17100(+1) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 17099(+0) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17100(+1) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:03) |
| ============================================================================================== |
| Wed Jun 21 21:13:49 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 17114(-81) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 38(+0) |
| Vias: 0(+0) |
| Trace length: 17195(+0) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17114(-81) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:03) |
| ============================================================================================== |
| Wed Jun 21 21:14:22 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+1) |
| Vias: 0(+0) |
| Trace length: 18523(+1285) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+1) |
| Vias: 0(+0) |
| Trace length: 19299(+2061) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18523(-776) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:14:28 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18523(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18523(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18523(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:03) |
| ============================================================================================== |
| Wed Jun 21 21:15:23 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+11) |
| Vias: 0(+0) |
| Trace length: 16987(+4341) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+11) |
| Vias: 0(+0) |
| Trace length: 17038(+4392) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16987(-51) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:15:30 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:15:37 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:15:44 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16987(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:26:09 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 17122(+1362) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 17122(+1362) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17122(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:26:16 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17122(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17122(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17122(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:26:35 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+2) |
| Vias: 0(+0) |
| Trace length: 17143(+747) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+2) |
| Vias: 0(+0) |
| Trace length: 17158(+762) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17143(-15) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:26:42 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17143(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17143(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17143(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:28:12 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+6) |
| Vias: 0(+0) |
| Trace length: 18223(+3788) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+6) |
| Vias: 0(+0) |
| Trace length: 18232(+3797) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18223(-9) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:02) |
| ============================================================================================== |
| Wed Jun 21 21:28:17 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18027(-196) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18223(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18027(-196) Mils |
| Rerouted: 0 |
| Duration 00:00:03(+00:00:03) |
| ============================================================================================== |
| Wed Jun 21 21:28:47 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+39) |
| Vias: 0(+0) |
| Trace length: 18066(+18066) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:08 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+39) |
| Vias: 0(+0) |
| Trace length: 18165(+18165) Mils |
| Duration 00:00:03(+00:00:02) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18066(-99) Mils |
| Rerouted: 0 |
| Duration 00:00:08(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:35:48 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+3) |
| Vias: 0(+0) |
| Trace length: 17526(+1871) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:08 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+3) |
| Vias: 0(+0) |
| Trace length: 17492(+1837) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17526(+34) Mils |
| Rerouted: 0 |
| Duration 00:00:08(+00:00:07) |
| ============================================================================================== |
| Wed Jun 21 21:36:04 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17526(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17526(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17526(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:37:07 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18099(+2886) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:04 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18403(+3190) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18099(-304) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:03) |
| ============================================================================================== |
| Wed Jun 21 21:38:08 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+7) |
| Vias: 0(+0) |
| Trace length: 17550(+2325) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:07 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+7) |
| Vias: 0(+0) |
| Trace length: 17712(+2487) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17550(-162) Mils |
| Rerouted: 0 |
| Duration 00:00:07(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:38:15 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:39:28 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17550(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:41:21 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+10) |
| Vias: 0(+0) |
| Trace length: 17178(+2753) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+10) |
| Vias: 0(+0) |
| Trace length: 17250(+2825) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17178(-72) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:06) |
| ============================================================================================== |
| Wed Jun 21 21:41:31 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17178(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 17178(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17178(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:42:14 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+2) |
| Vias: 0(+0) |
| Trace length: 17146(+430) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+2) |
| Vias: 0(+0) |
| Trace length: 17146(+430) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 17146(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:42:25 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+10) |
| Vias: 0(+0) |
| Trace length: 16965(+2836) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:03 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+10) |
| Vias: 0(+0) |
| Trace length: 16980(+2851) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16965(-15) Mils |
| Rerouted: 0 |
| Duration 00:00:02(+00:00:01) |
| ============================================================================================== |
| Wed Jun 21 21:42:34 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16965(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 16965(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 16965(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:04(+00:00:04) |
| ============================================================================================== |
| Wed Jun 21 21:42:58 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18810(+5337) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:07 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+4) |
| Vias: 0(+0) |
| Trace length: 18862(+5389) Mils |
| Duration 00:00:01(+00:00:01) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18810(-52) Mils |
| Rerouted: 0 |
| Duration 00:00:07(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:43:08 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18810(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18810(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18810(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:44:18 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+3) |
| Vias: 0(+0) |
| Trace length: 18825(+1125) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+3) |
| Vias: 0(+0) |
| Trace length: 18825(+1125) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18825(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:45:11 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18825(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18825(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18825(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:46:32 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+5) |
| Vias: 0(+0) |
| Trace length: 18804(+1048) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:06 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+5) |
| Vias: 0(+0) |
| Trace length: 18824(+1068) Mils |
| Duration 00:00:01(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18804(-20) Mils |
| Rerouted: 0 |
| Duration 00:00:06(+00:00:05) |
| ============================================================================================== |
| Wed Jun 21 21:47:06 2006 |
| |
| Autorouting D:\KAKLIK\schemata\default_blz1.pcb |
| ============================================================================================== |
| Pre-routing analysis |
| |
| Warning:Not enough vias for routing from the top to the bottom of the design. |
| To correct the problem, define additional vias or enable vias for routing using |
| the Via Biasing tab of the Design Properties dialog box. |
| ============================================================================================== |
| Passes Processed: Route, Optimize |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18804(+0) Mils |
| Test points: 0(+0) |
| Accessible nets: 0(+0) |
| Duration 00:00:05 |
| ============================================================================================== |
| |
| Pass: 3 (Route) |
| Routed Connections: 39(+0) |
| Vias: 0(+0) |
| Trace length: 18804(+0) Mils |
| Duration 00:00:00(+00:00:00) |
| ============================================================================================== |
| |
| Pass: 4 (Optimize) |
| Vias: 0(+0) |
| Trace length: 18804(+0) Mils |
| Rerouted: 0 |
| Duration 00:00:05(+00:00:05) |
| ============================================================================================== |